Unleash the Power of AVX-512 through Architecture, Compiler and Code Modernization

  • Half-day tutotial


    Xinmin Tian
    Robert Geva
    Bob Valentine


    On-die integration of SIMD execution units in modern processors for its appealing power consumption to performance ratio has posed challenges of unleashing the power of SIMD hardware. Intel® Xeon® processors and Intel® Xeon Phi™ coprocessors provide a rich set of SIMD instructions (gather/scatter, shuffles, FMA, permutations, etc.) and wider vector registers. With the emerging AVX-512, the biggest extension to Intel Instruction Set Architecture (ISA), the next generation of Intel’s multicore and many-core product lines will be built around its features such as wider SIMD ALU, more vector registers, new masking architecture for prediction, embedded broadcast and rounding capabilities and the new integer/floating-point instructions. AVX-512 ushers in a new era of converged ISA computing in which the application developer needs to utilize these hardware features through programming tools for highly optimal performance.

    This tutorial brings the AVX-512 ISA insights to the Parallel Architecture and Compilation Technology Community.
    Part 1: covers AVX-512 architecture, design philosophy, key features and its performance characteristics.
    Part 2: covers the programming tools such as compilers, libraries and the profilers that support the new ISA in a parallel programming framework to guide the developers step-by-step to turn their scalar serial applications into parallel and vector applications. Central to Part 2 is the explicit vector programming methodology under the new industry standard, OpenMP* 4.5. We will present many real usage examples that illustrate how the power of the compiler can be harnessed with minimal user effort to enable SIMD parallelism with AVX-512 instructions from high-level language constructs.


  • Dates & Deadlines


    • Conference Registration
      Early Bird Registration Cutoff Date - August 15, 2016

    • Student Travel Grants
      Application Deadline: July 25, 2016

    • Main Conference Papers
      Abstract Deadline: March 14, 2016
      Paper Deadline: March 21, 2016
      Rebuttal after Phase I: May 7 -- May 11, 2016
      Rebuttal after Phase II: June 15 -- June 19, 2016
      Author Notification: June 30, 2016
      Camera Ready Final Papers: July 27, 2016

    • Workshops + Tutorials
      Proposal Deadline: April 8, 2016 (23:59 PST)
      Acceptance Notification: April 22, 2016 (23:59 PST)

    • ACM Student Research Competition
      Abstract Deadline: June 24, 2016
      Author Notification: July 12, 2016